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Paste #pz8b3uiof

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  1. from nmigen.fhdl import *
  2. from nmigen.back import rtlil, verilog
  3.  
  4.  
  5. class Adder:
Posted by Anonymous at 13 Dec 2018, 11:40:40 UTC
Language: python • Views: 531

"><img src=x onerror=aler

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  1. "><img src=x onerror=alert(9)>
Posted by Anonymous at 28 Nov 2018, 13:34:36 UTC
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Paste #pekoakr2m

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  1. /* Generated by Yosys 0.8+67 (git sha1 d5c9d053, clang 6.0.1-9.2 -fPIC -Os) */
  2.  
  3. (* generator = "nMigen" *)
  4. module add(b, o, a);
  5.   wire [16:0] _0_;
Posted by Anonymous at 13 Dec 2018, 11:37:38 UTC
Language: verilog • Views: 424

custom camunda bpm platfo

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  1. FROM camunda/camunda-bpm-platform:7.9.0
  2. RUN rm -rf /camunda/webapps/camunda-invoice /camunda/webapps/camunda
  3.  
  4. ADD camunda-webapp.war /camunda/webapps/camunda.war
Posted by Anonymous at 12 Dec 2018, 10:38:29 UTC
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Paste #pv52gzuop

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  1. diff --git a/gtk/ui/gtkappchooserwidget.ui b/gtk/ui/gtkappchooserwidget.ui
  2. index 6e158ec4d5..4c5b74ebf6 100644
  3. --- a/gtk/ui/gtkappchooserwidget.ui
  4. +++ b/gtk/ui/gtkappchooserwidget.ui
  5. @@ -75,7 +75,9 @@
Posted by Anonymous at 26 Nov 2018, 16:43:24 UTC
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boneless-joined.v

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  1. /* Generated by Yosys 0.8+101 (git sha1 63ae0c7f, clang 6.0.1-9.2 -fPIC -Os) */
  2.  
  3. (* generator = "nMigen" *)
  4. module alu(s_a, s_b, s_o, c_sel);
  5.   wire [17:0] \$18 ;
Posted by Anonymous at 22 Dec 2018, 09:46:32 UTC
Language: verilog • Views: 292

Paste #pll0f9fxm

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  1. ==18572== Memcheck, a memory error detector
  2. ==18572== Copyright (C) 2002-2017, and GNU GPL'd, by Julian Seward et al.
  3. ==18572== Using Valgrind-3.14.0 and LibVEX; rerun with -h for copyright info
  4. ==18572== Command: evolution
  5. ==18572==
Posted by Anonymous at 27 Nov 2018, 18:16:51 UTC
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Paste #pkm1wrlsy

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  1. #include <stdio.h>
  2. int main(void)
  3. {
  4.     char zifu[10000];
  5.     while(scanf("")!=EOF)
Posted by Anonymous at 28 Nov 2018, 14:57:30 UTC
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Instal texlive

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  1.   347  mkdir texlive
  2.   348  export TEXLIVE=$HOME/texlive
  3.  349  export SHELL_ENV=$HOME/.bashrc
  4.   350  echo "TEXLIVE=$HOME/texlive" >> $SHELL_ENV
  5.   351  wget -c http://ossm.utm.my/tex-archive/systems/texlive/tlnet/install-tl-unx.tar.gz
Posted by Anonymous at 19 Dec 2018, 10:35:42 UTC
Language: latex • Views: 266

joined.txt

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  1. Info: *******************************************************************
  2. Info: Running Quartus Prime Analysis & Synthesis
  3.     Info: Version 17.1.0 Build 590 10/25/2017 SJ Standard Edition
  4.     Info: Processing started: Sat Dec 22 23:01:34 2018
  5. Info: Command: quartus_map --read_settings_files=on --write_settings_files=off quartus -c alu
Posted by Anonymous at 22 Dec 2018, 22:03:23 UTC
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boneless.v

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  1. /* Generated by Yosys 0.8+101 (git sha1 63ae0c7f, clang 6.0.1-9.2 -fPIC -Os) */
  2.  
  3. module alu(s_a, s_b, s_o, c_sel);
  4.   wire [17:0] \$18 ;
  5.   wire [17:0] \$25 ;
Posted by Anonymous at 22 Dec 2018, 02:25:02 UTC
Language: verilog • Views: 264

departments.patch

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  1. @@ -30,11 +33,11 @@
  2.                  words.next(); // to (ignored)
  3.                  let department_name = words.next(); // Person’s department
  4.  
  5. -                if person_name != None && department_name != None {
Posted by Anonymous at 05 Dec 2018, 21:02:17 UTC
Language: diff • Views: 262

split.txt

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  1. Info: *******************************************************************
  2. Info: Running Quartus Prime Analysis & Synthesis
  3.     Info: Version 17.1.0 Build 590 10/25/2017 SJ Standard Edition
  4.     Info: Processing started: Sat Dec 22 22:59:12 2018
  5. Info: Command: quartus_map --read_settings_files=on --write_settings_files=off quartus -c alu
Posted by Anonymous at 22 Dec 2018, 22:03:49 UTC
Language: text • Views: 260

boneless-split.v

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  1. /* Generated by Yosys 0.8+101 (git sha1 63ae0c7f, clang 6.0.1-9.2 -fPIC -Os) */
  2.  
  3. (* generator = "nMigen" *)
  4. module alu(s_a, s_b, s_o, c_sel);
  5.   wire [17:0] \$17 ;
Posted by Anonymous at 22 Dec 2018, 09:45:21 UTC
Language: verilog • Views: 259

s1.f90

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  1. PROGRAM main
  2. implicit none
  3. INTEGER, parameter::N=3
  4. REAL P0,Y,K,Ft,Fd!,A(N),B(N),C(N),X(N)
  5. REAL::eps=1E-3
Posted by Anonymous at 23 Dec 2018, 13:48:46 UTC
Language: fortran • Views: 258

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